1. Field of the Invention
The present invention relates to emissive imager devices comprising monolithic semiconductor arrays of multicolor light emitters that can be used as an image or light sources for display, projection or illumination applications. The invention further relates to epitaxial growth of compound semiconductor layers for use in the emissive imager, and methods to improve the quality and performance thereof. The invention further relates to the epitaxial growth of compound semiconductor template layers having periodic arrays of reduced defect density suitable for production of superior performance light emitting devices.
2. Prior Art
References Cited
[1] U.S. Pat. No. 7,623,560, Quantum Photonic Imagers and Methods of Fabrication Thereof, EI-Ghoroury et al, Nov. 24, 2009
[2] U.S. Pat. No. 7,767,479, Quantum Photonic Imagers and Methods of Fabrication Thereof, EI-Ghoroury et al, Aug. 3, 2010
[3] U.S. Pat. No. 7,829,902, Quantum Photonic Imagers and Methods of Fabrication Thereof, EI-Ghoroury et al, Nov. 9, 2010
[4] U.S. Pat. No. 8,049,231, Quantum Photonic Imagers and
Methods of Fabrication Thereof, EI-Ghoroury et al, Nov. 1, 2011
[5] U.S. Pat. No. 8,243,770, Quantum Photonic Imagers and Methods of Fabrication Thereof, EI-Ghoroury et al, Aug. 14, 2012
[6] U.S. Pat. No. 8,567,960, Quantum Photonic Imagers and Methods of Fabrication Thereof, EI-Ghoroury et al, Oct. 29, 2013
[7] U.S. Pat. No. 7,220,324, Techniques for the Growth of Semi-Polar Gallium Nitride, Baker et al, May 22, 2007
[8] Grandjean et al., J. Appl. Phys. 86 (7) 3714 (1999). [C-PLANE POLARIZATION]
[9] Northrup, Appl. Phys. Lett. 95, 133107 (2009). [{11.2} THEORY]
[10] Gale et al., Appl Phys. Lett. 41 (6) 545 (1982). [GaAs LEO]
[11] Kapolnek et al., Appl. Phys. Lett. 71 (9) 1204 (1997) [C-GaN LEO]
[12] Craven et al., Appl. Phys. Lett. 81 (7) 1201 (2002) [a-GaN LEO MOCVD]
[13] Haskell et al., Appl. Phys. Lett. 83 (4) 644 (2003) [a-GaN LEO HVPE]
[14] Haskell et al., Appl. Phys. Lett. 83 (8) 1554 (2003) [a-GaN HVPE]
[15] Haskell et al., Appl. Phys. Lett. 86, 111917 (2005) [m-GaN LEO HVPE]
[16] Imer et al., Appl. Phys. Lett. 88, 061908 (2006). [NONPOLAR SLEO]
[17] Strittmatter et al, Phys. Status Solidi B248, No. 3, 561-573 (2011)
The advent of efficient direct bandgap compound semiconductor materials and devices has given rise to a multitude of novel products, ranging from simple single color, point source light emitting diodes (LEDs) for indicator applications; to energy efficient multi-color or color-mixed LEDs for general illumination and display applications; to active digital display technology based on passive or emissive imagers. Of particular interest to the field of this invention are compound semiconductor templates, layers, and devices that can be utilized in emissive imagers and solid state light engines. Emissive imagers and light engines face strong competition from established low-cost technologies, effective means to improve their performance while significantly reducing their cost is crucial for these technologies future.
A novel emissive imager was disclosed in Ref [1-6], incorporated by reference herein, which relies on the use of bonded III/V compound semiconductor light emitting structures to efficiently generate light. Such a bonded III/V compound semiconductor emissive imager is illustrated in FIG. 1.
While the principal application of such emissive imagers is as engines for a projection display, the same devices could be utilized for illumination applications, including but not limited to general solid state lighting, adjustable directional lighting, and color-tunable specialty lighting. However, such lighting applications depend on high luminous flux emanating from the imager's pixel array. Similarly, the performance characteristics of the emissive imager in projection display applications significantly depends on the luminous flux the imager is capable of generating. It is therefore desirable to create an emissive imager that maximizes the luminous intensity emitted from each light generating element or pixel.
Practically speaking, luminous flux of III/V compound semiconductor light emitters is intimately tied to the external quantum efficiency of the photon generation process within the semiconductor device. Inefficient light emitters convert electric current to heat via non-radiative recombination, which further degrades emitter efficiency and risks thermal damage to the light emitter and/or thermally coupled electronics and optics. It is therefore preferable to utilize a high-efficiency semiconductor light source when fabricating an emissive imager.
Red light emitting diodes and laser diodes are predominantly fabricated using III/V compound semiconductors of the (Al, In, Ga)(As, P) (III-arsenide-phosphide) system. In contrast, the (Al, In, Ga)N(III-nitride) material system is suitable for fabrication of visible light diodes (LEDs and laser) spanning the entire visible spectrum, with current commercial emphasis placed on blue, green, and white emitters.
The efficiency of a compound III/V semiconductor light emitter, whether based on the III-arsenide-phosphide or III-nitride system, is highly dependent on the density of microstructural crystalline defects in the emitter material. The most common of such microstructural crystalline defects are known as threading dislocations, as described in U.S. Ser. No. 09/247,413 and Ref [14] for III-arsenides-phosphides and III-nitrides, respectively. Various III/V compound semiconductor materials tolerate the presence of such microstructural crystalline defects differently. However, across all materials systems, it can be broadly stated that, within certain defect density ranges, the radiative recombination efficiency of the III/V compound semiconductor material increases as microstructural crystalline defect density decreases.
III-arsenide-phosphide semiconductor light emitters have been historically grown via metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or hydride vapor phase epitaxy (HVPE). These growth techniques are utilized to homoepitaxially deposit layers of III-arsenide-phosphide material upon either GaAs or InP substrates. These homoepitaxial substrates exhibit low threading dislocation and stacking fault densities. In some instances, however, it may be desirable to grow III-arsenide-phosphide semiconductor light emitters on alternate substrates via heteroepitaxy. Such heteroepitaxial growth may provide advantages for integration of the compound semiconductor layers with conventional electronics structures based on silicon or optical structures, for example. A significant drawback to such heteroepitaxy, however, is the tendency for elevated densities of threading dislocations to form.
III-nitride semiconductor light emitters have historically been grown heteroepitaxially due to the limited availability of native GaN, AIN, or InN substrates. Sapphire (Al2O3), silicon carbide (SiC), spinel (Mg2AlO4), and silicon (Si) have been most commonly utilized for such heteroepitaxial growth. Typical III-nitride layers heteroepitaxially grown upon these layers commonly exhibit extremely high threading dislocations densities, on the order of 108 to 1010 dislocations per square centimeter. Such high dislocation densities dramatically reduce the radiative recombination efficiency of III-nitride light emitters and increase heat generation, making such light emitters less desirable for illumination and display applications.
With respect to würtzite III-nitride growth, it is necessary to further specify crystal orientation when designing and executing epitaxial growth processes. Referring to FIG. 2(a), the majority of III-nitride films, templates, and devices are presently grown along the polar c-axis. The surface of such polar III-nitride material is referred to as the “c-plane.” Such surfaces exhibit a hexagonal array of group III atoms in the case of metal-polar termination, or a hexagonal array of nitrogen atoms in the case of “N-polar” termination. III-nitride devices, such as LEDs and laser diodes, are most commonly, though not exclusively, fabricated on the metal-terminated c-plane, most commonly the Ga-polar c-plane of GaN substrates and templates. Devices, templates, and substrates having a primary surface orientation parallel to the III-nitride c-plane will be collectively referred to herein as “polar” or “c-plane” nitrides, substrates, templates, or devices, as appropriate. Using common Miller-Bravais {hkil} index notation, the polar c-planes can be collectively described by the indices {0001}. More specifically, the metal-terminated c-plane is referred to as the (0001) plane while the nitrogen-terminate c-plane is referred to as the (0001) plane. Alternate notation for these planes that recognizes the redundancy of the h, k, and i indices is (00.1) and (00.1) for the metal-terminated and N-terminated c-planes, respectively.
While much progress has been made in the development of polar nitride devices, such polar nitrides suffer from significant built-in polarization fields that degrade efficiency and performance (see Grandjean et al., for example). Recently attempts have been made to grow III-nitrides on alternate crystal orientations to avoid the deleterious polarization effects of such polar nitrides Ref [16]. One class of such alternate orientations is referred to as “non-polar” Ill-nitrides. Generally speaking, any crystal plane in the würtzite III-nitride crystal system having indices {hki0}/{hk.0} can be described as a non-polar plane. The two most common non-polar plane orientations are the {11.0} a-planes and {10.0} m-planes, as illustrated in FIGS. 2(b) and 2(c), respectively. In the case of all non-polar III-nitride planes, the polar c-axis lies approximately parallel to the surface of the substrate, template, or device film. Polarization fields still exist in such non-polar III-nitrides; however, their deleterious influence is minimized for vertical devices grown on such non-polar planes. Waltereit et al., Craven et al., and Haskell et al. provided details regarding initial demonstrations of non-polar GaN growth by MBE, MOCVD, and HVPE, respectively; these reports are incorporated by reference herein.
Semi-polar planes represent a third class of crystal orientations that is relevant for the fabrication of III-nitrides, the growth of which were described by Baker et al in U.S. Pat. No. 7,220,324. A semi-polar plane is any crystal plane having at least two non-zero h, k, and/or i Miller-Bravais indices and a non-zero/Miller-Bravais index. Some common examples of semi-polar planes are the {30.1}, {20.1}, {10.1}, {10.2}, {10.3}, and {11.2} families of planes. FIG. 3 illustrates several such planes. Semipolar planes exhibit reduced polarization fields perpendicular to the major substrate/template/film surface compared to polar planes. As described by Northrup, which is incorporated by reference herein, the piezoelectric and spontaneous polarization components of the total polarization partially or completely cancel each other depending on the composition of layers grown on said semi-polar planes.
In order to improve the performance of both III-arsenide-phosphide and III-nitride compound semiconductor light emitters, lateral epitaxial overgrowth (LEO) methods have been demonstrated for these materials systems. In such LEO methods, the semiconductor material is grown selectively in lateral (parallel to the plane of the substrate) directions or inclined (neither parallel nor perpendicular to the plane of the substrate) directions rather than vertical (perpendicular to the plane of the substrate) directions. Several examples of such LEO methods are illustrated in FIG. 4. Commonly, LEO techniques utilize application of a mask material to either the substrate or a thin film of the desired compound semiconductor material upon said substrate (a template). The mask is selected from a variety of materials including, but not limited to, silicon oxide (SiOx), silicon nitride (SiNx), titanium nitride (TiN), and a variety of compounds and metals. The critical feature of the mask material is that it must provide selectivity for growth of the compound semiconductor material: nucleation of the semiconductor on the mask is thermodynamically or kinetically unfavorable compared to growth on the semiconductor itself.
Depending on the semiconductor material to be grown, the orientation of the heteroepitaxial substrate and/or template layers upon said substrate, the orientation of the mask, the epitaxial growth method utilized, and the epitaxial growth process parameters utilized, LEO techniques are theoretically capable of reducing microstructural defect densities by several orders of magnitude compared to typical heteroepitaxial grown material. Theoretically, LEO techniques coupled with heteroepitaxial growth could provide significant advantages for compound semiconductor LED fabrication processes versus those which are based upon thin film processing on carrier wafers. LEO processes have been demonstrated for III-arsenide-phosphides by Gale et al, for example. Kapolnek et al. demonstrated c-plane III-nitride LEO growth in various mask orientations. Craven et al. demonstrates non-polar a-plane III-nitride LEO growth via MOCVD. And Haskell et al. demonstrated both a-plane and m-plane III-nitride LEO growth via HVPE.
Emissive imagers such as the Quantum Photonic Imager Ref [1-6], would benefit significantly from reduced defect density compound semiconductor substrate or template material as peak efficacy of such imagers would increase compared to those fabricated via conventional heteroepitaxial growth. Such reduced defect density material could theoretically be achieved with LEO-type processes. However, mask-based LEO techniques are not widely utilized in commercial LED or laser diode fabrication because they are costly and difficult to implement, generally provide for incomplete or inhomogeneous defect reduction, and can increase strain within the semiconductor material layers compared to non-LEO heteroepitaxially grown material.
Emissive imagers would further benefit from the availability of large-area non-polar and/or semi-polar III-nitride substrates and templates possessing low microstructural defect densities. Such substrates and/or templates would enable increased luminous flux emissive imagers to be fabricated cost-effectively. However, at present large area, low-defect density non-polar and semi-polar III-nitride substrates and templates are not widely available.
It is clear that there is a need for reduced defect density compound semiconductor material that is compatible with the fabrication of emissive imagers. In particular, there is a need for templates that provide low-defect densities in active regions of emissive imager pixels. It is further clear that there is a need for non-polar and semi-polar III-nitride templates and/or substrates that provide low defect densities in active regions of emissive imager pixels. Additional objectives, advantages, and uses of the invention described herein will become apparent from the following detailed description of the preferred embodiments thereof that proceeds with reference to the accompanying drawings.